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Shmoo plot
In electrical engineering, a shmoo plot is a graphical display of the response of a component or system varying over a range of conditions and inputs. Often used to represent the results of the testing of complex electronic systems such as computers or integrated circuits such as DRAMs, ASICs or microprocessors. The plot usually shows the range of conditions in which the device under test operates (in adherence with some remaining set of specifications). The term was in use in 1970 to refer to the "tuning" of ferrite core memory stacks on IBM systems.
For example, when testing semiconductor memory: voltages, temperature, and refresh rates can be varied over specified ranges and only certain combinations of these factors will allow the device to operate. Plotted on independent axes (voltage, temperature, refresh rates), the range of working values will enclose a three-dimensional, usually oddly-shaped volume. Other examples of conditions and inputs that can be varied include frequency, temperature, timing parameters, system- or component-specific variables, and even varying knobs tweakable during silicon chip fabrication producing parts of varying quality which are then used in the process.
Often one 'knob' or variable is plotted on one axis against another knob or variable on another axis, producing a two dimensional graph. This allows the test engineer to visually observe the operating ranges of the device under test. This process of varying the conditions and inputs to the component or system may sometimes be referred to as 'shmooing' but more officially known as electrical testing or qualification. Automatic test equipment often contains software features that allow automated shmooing of a part.
== Origin ==
The Shmoo Plot was invented by VLSI Hall Of Fame inductee Robert Huston.
抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』
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